1. Field of the Invention
The present invention relates generally to a method of fabricating a semiconductor device, and, more specifically, to a dry etching method for fabricating a semiconductor device.
2. Prior Art
Conventional methods of fabricating semiconductor devices implement anisotropic etching, as disclosed in Japanese Unexamined Patent Publication Nos. 316440/1988, 299343/1988, 278339/1988, 278338/1988, and 260133/1988, which disclose a variety of etching gas species, by protecting the sidewalls of a material to be etched. As shown in FIGS. 7, for example, a wafer which is to be subjected to etching includes a silicon substrate 21, a silicon oxide film 25, a polycrystalline silicon (polysilicon) layer 22 and a photoresist layer 24, in that order. In order to protect the sidewalls, a deposit 26 is formed on the sidewalls.
While some recent methods implement etching with extremely satisfactory profile control by adding Cl.sub.2 to HBr, they protect the sidewalls by deposition of an oxide film in a manner similar to that of the said Japanese Unexamined Patent Publication No. 316440/1988.
Thus, in the methods of fabricating semiconductor devices disclosed above, anisotropic etching is implemented by protecting the sidewalls of a material to be etched with a silicon oxide film-containing deposit, which requires additional processing of the semiconductor device for removing the deposited film after the etching process has been completed, thereby complicating the fabrication process. At the same time, deposit-induced contamination can also cause problems in the functioning of semiconductor elements. In addition, since the profile-controlled etching, which involves addition of Cl.sub.2 to HBr, deposits oxide films to protect the sidewalls, in a manner similar to the said Japanese Unexamined Patent Publication No. 316440/1988, such etching requires postprocessing for removing the oxide film in order to further process a gate material. For this reason, the gate oxide film below the ends of the gate is consequently removed simultaneously, which, it will be noted, decrease of the breakdown voltage of the gate film.